I. Large-scale Capacity Layout: Multi-dimensional Guarantee of Supply Capacity

With the full-size wafer production line as the core, a stepped capacity matrix covering advanced and mature processes is established to ensure stable supply of batch orders:

Full-size production lines work together: A complete series of 12-inch and 8-inch wafer production bases have been built, with the 12-inch production line accounting for over 65% of the total. Each production line has a monthly capacity of 100,000 wafers, capable of supporting the mass production of 5nm-28nm advanced process chips; The 8-inch production line focuses on automotive-grade, industrial, etc., mature processes, with an annual capacity exceeding 780,000 wafers, forming a capacity layout of "advanced process leading, mature process as the backup". For third-generation semiconductors such as SiC and GaN, dedicated 6-inch production lines have been separately set up, with a monthly capacity of 6,000 wafers, meeting the batch demand of high-voltage scenarios in new energy vehicles, etc.

Precise control of capacity utilization: Through the intelligent scheduling system, resources are dynamically allocated. The utilization rate of advanced process capacity is stable at over 80% (significantly higher than the industry average of 70%), with the load rate of 5nm/4nm processes approaching 90%; The utilization rate of mature processes relies on flexible production mode, maintaining within the range of 75%-85%, capable of quickly accepting multi-category batch orders. The total chip delivery volume in 2025 will exceed 185 million pieces, with the highest monthly delivery volume exceeding 200,000 chips for supporting components.

Continuous expansion of capacity: Multiple capacity expansion projects have been initiated, with the 12-inch production line expected to be put into production in the second quarter of 2026, when the total capacity will increase by 40%; The 8-inch production line will achieve capacity growth through equipment upgrades, with the monthly capacity increasing from the current 40,000 wafers to 60,000 wafers, and the packaging and testing capacity will be expanded simultaneously to ensure the matching of "manufacturing - packaging - testing" throughout the production chain.